In recent years, a stacked type semiconductor memory device has been proposed in which memory cells are integrated three-dimensionally. In the stacked type semiconductor memory device, a stacked body is formed in which interconnect layers and insulating layers are stacked alternately; semiconductor members that extend in the stacking direction are provided inside the stacked body; and charge storage members are provided between the interconnect layers and the semiconductor members. Thereby, memory cell transistors are formed at each crossing portion between the interconnect layers and the semiconductor members. In such a stacked type semiconductor memory device, the resistance value of the interconnect layer undesirably increases when increasing the arrangement density of the semiconductor members to increase the integration of the memory cell transistors.